Digital data transmission over a relatively long distance is usually transmitted over a single transmission channel in a serial bit stream format. In this format digital data, which usually uses eight, sixteen or thirty-two bits to represent a value or character, is transmitted serially, bit by bit, so that every eighth, sixteenth or thirty-second bit respectively is part of a new value or character.
An example of the use of serial data transmission is the transmission of telephone communications which have been digitized. Long distance transmission of digital telephone communications usually involve a process of combining or multiplexing many telephone calls onto one line. Several standards have been promulgated for such multiplexed telephone transmissions, one of which is referred to as the T1 standard. Telephone communications (data) is transmitted as a serial bit stream at 1.544 megabits/second.
A subset of the T1 standard is the ESF standard as described in AT&T Compatibility Bulletin No. 142, "The Enhanced Superframe Format Interface Specification" dated December, 1983. In the ESF standard, the data is divided into blocks of data of 193 bits each, and the first of each fourth block contains a predetermined framing bit. These framing bits are taken from the bit pattern 001011 so that the first framing bit is a 0 (zero) at the beginning of the fourth block, the second framing bit (at the beginning of the eighth block) is also a 0, the third framing bit (at the beginning of the 12th block) is a 1 (one), the fourth framing bit (at the beginning of the 16th block) is a 0, the fifth framing bit (at the beginning of the 20th block) is a 1, and the sixth framing bit (at the beginning of the 24th block) is a 1. Then the pattern repeats so that the framing bit at the start of the 28th, 32th, 36th, 40th, 44th and 48th block is 001011 respectively.
During transmission of data using the T1 standard, a separate clock signal is not transmitted; only the serial bit stream of data is transmitted. The receiver must determine where the boundaries of each individual bit occur in order to synthesize a clock signal which will be locked in phase with the serial bit stream. Once the bit timing has been established, the position of the framing bit needs to be established in order to synchronize the receiver with the transmitter. These framing bits are embedded into the data stream to enable the receiver to perform this synchronization since all of the other bits are essentially random data to the receiver synchronization circuit.
The synchronization process examines each bit of the incoming serial data to find out if the bit is part of the framing pattern. This must be repeated 4,632 bits later to see if the same pattern occurs since there is a finite probability that the first pattern was a random data pattern rather than the framing pattern. In practice this framing pattern is constantly checked in order to verify synchronization.
Of importance in the synchronization process is the speed at which the framing pattern is identified since data is not being properly decoded until the receiver is properly in synchronization with the transmitter. Also of importance, especially when the synchronization circuitry is embodied in an integrated circuit, is the amount of circuit space required for the synchronization. The amount of circuitry required directly affects the size of the integrated circuit (or portion of the integrated circuit) needed for the synchronization.
Therefore, it can be appreciated that a synchronization method which is relatively fast and that also uses a relatively small area on an integrated circuit is highly desirable.